Job Title: ASIC RTL Design LeadJob ID: DR632345511Location: Ottawa, ON Overview:Headquartered in Ottawa, our client serves the electronic design community from Canada, specializing in ASIC and FPGA design and verification, and embedded software development services. They are currently searching globally for a number of key technical resources, including a highly experienced ASIC RTL Design Lead. They are looking for world-class engineers, and that means worldwide searching. If you are an exceptional ASIC Designer with an interest in coming to Canada to work with us, we want to hear from you. In this role you will lead front-end logic development, from specs to micro-architecture to verified RTL to timing clean netlists, on challenging sub-systems. These sub-systems will likely be a part of very large and complex GPU/AI or networking SOCs in advanced technology nodes down to 3nm FinFET. You will help build and then lead a highly competent team of designers, playing a key role in integrating new capabilities into their clients' world-class ASICs.What you will be doing:

• Understand high-level ASIC requirements architecture and translate them into micro-architecture and high-level design.
• Lead the front-end ASIC design effort on complex ASIC sub-systems development from specifications to netlist hand-off to PnR.
• Support ASIC lead on project planning and management ASIC front-end developments.
• Support SOC integration and PnR team implementation to GDSII for the above.
• Design and implement RTL logic (mainly Verilog or System Verilog), run and debug block-level simulations, ASIC constraint development, synthesis and timing closure.
• Provide technical support to customers and lead them through complex technical issues.

What you must have:

• Minimum of an undergraduate degree in CS, EE or equivalent skills/experience.
• 12+ years of ASIC design and related experience.
• Experience with modern day ASIC development including RTL logic design, (physical) synthesis, STA, lint, LEC, and understanding of PnR.
• Proven experience with the duties and responsibilities listed above.
• Experience with complex asynchronous clock architectures and high-speed serial interfaces.
• Experience evaluating and integrating 3rd party IP.
• Experience or knowledge in some of the following: Multi-rate PCS, 10/25/40/100GbE, Transceivers, Packet Processing, OTN, Routers/Switches, Cellular, Mobile Devices, Video Processing, GPUs, AI Hardware Acceleration.
• Experience with industry standard interfaces e.g. Ethernet, OTN, SONET, PCIe, SPI, I2C, USB, AMBA, GPIO, SRIO, DDR/SDRAM, DMA, 4G, LTE, 5G, O-RAN, 3GPP, H.264.
• Experience in a lab environment, troubleshooting issues up to the system level.
• Track record as a self-starter, a team player and a leader.

For more information about TEEMA and to consider other career opportunities, please visit our website at www.teemagroup.comBy applying to TEEMA on any job portal implies you are entering into a business relationship with us and therefore grants TEEMA consent to send you further job updates or industry and company-related information.